Edge AI is one of the hot topics in the field of research on AI Hardware and Software. Here at CAS lab we have started our research on Edge AI training and Inference.

As you know, there are many powerful AI models out there today and most of them depend on large servers and cloud computing. But for applications such as wearable healthcare devices, environmental sensing and portable monitoring systems, sending data to the cloud is not always as practical, it costs energy, adds latency and raises privacy concerns. Our goal is to bring intelligence directly to the edge: small, ultra low-power chips that can learn and make decisions on their own.

Why Reservoir Computing?

Although there are many approaches to machine learning, we focus on Reservoir Computing (RC). RC is a lightweight framework for processing time-series data, it especially excels at dealing with temporal tasks where the model needs to have a memory of past inputs, such as Human speech recognition, prediction tasks, biomedical signals and so on. Its key attraction is simplicity: the main body of the network (the “reservoir”) is fixed and does not need to be trained while only a small output layer is learned. This makes RC an excellent match for compact, energy-efficient hardware, where full-scale training of deep neural networks would be far too costly.

Our Research Plan

Our research proceeds along three directions:

1. Hardware-friendly reservoir architectures. We study simplified, regular reservoir structures that can be easily implemented on the chip, using techniques like low-precision arithmetic. The aim is a reservoir that is small, predictable, and easy to fabricate, while still retaining the computational richness needed for real-world tasks.
2. On-chip learning. Most existing edge AI chips perform only inference, with training done off-chip on a PC or FPGA. We are investigating how the learning itself and the inference/training of the readout layer can be carried out on the same chip, using numerically robust adaptive algorithms realized in fixed-point arithmetic. On-chip learning would allow a device to be self sustainable making this a key step towards truly self-contained edge intelligence.
3. Adaptation at the edge. Real-world environments are not static: signal characteristics shift over time, and conditions vary between users, sensors, and deployments. Building on our on-chip learning capability, we aim to study how a device can continuously adapt to such changes in the field while maintaining accuracy over long-term operation without retraining in the cloud.

We evaluate our designs on standard benchmarks, analyzing robustness, precision requirements, and the trade-offs introduced by hardware constraints.

Outlook

Our roadmap begins with Algorithm-level Simulation to check the validity of the proposed model then move from simulation towards the silicon: a fully integrated digital reservoir computing chip combining inference and adaptation on a single die. We believe this line of research will contribute to a new generation of intelligent edge devices always on, energy-efficient, and capable of learning at the Edge bringing meaningful value to society.

If you are a student interested in AI hardware or machine learning and would like to help us on this journey, please feel free to contact us!